1.中斷和異常的概念
以上定義摘自Intel官方文檔80x86編程手冊第三卷第五章Interupt and Exception Handling。從中可以看出中斷來自外圍設備(peripheral devices，這裏指除了CPU)的通知(signals from hardware)，而異常則是CPU在執行指令時遇到錯誤的條件（error condition, 我認爲這裏的錯誤的條件實際上就是錯誤的操作數(error operand)），所以說中斷是由外圍設備產生的，而異常是由CPU自身產生的（在執行指令時）。
注意：上文中有這樣一句話：Software can also generate interrupts by executing the INT n instruction.表明軟件也可以生成中斷，也就是說我們的編寫的程序也可以通過INT n指令來生成中斷，事實上 CPU 將一些常用的功能以中斷處理器（handler）形式提供給我們，作爲我們的程序與 CPU 某些特殊功能的調用接口（在高級語言編程中，我們的程序直接調用API函數，從而使用系統提供給我們的功能，這和中斷處理器類似），所以當我們在程序中使用中斷時，就可以認爲該中斷就是一次系統的函數調用（實際上是CPU內部功能的調用）。
2.中斷和異常的通用處理機制
從以上的描述可以看出processor對於中斷和異常的處理過程基本一致，分爲以下三個過程
a. processor掛起當前運行的過程或任務
b. processor執行中斷或異常的處理器（handler）
c. handler執行完畢之後，processor喚醒要執行的過程或任務
注意截圖中紅色劃線的句子，這句話說明了步驟c應該如何決斷：如果喚醒被掛起的過程或任務之後不破壞程序的連續性（程序邏輯的正確性），則processor應該將被掛起的過程或任務喚醒，否則處理器(handler)被執行以後異常就不應該被恢復，而中斷就應該將當前運行的程序終止。
3.中斷和異常產生的來源
3.1中斷的來源：
3.2異常的來源：
4.異常的分類
Exceptions are classified as faults, traps, or aborts depending on the way they are reported and
whether the instruction that caused the exception can be restarted with no loss of program or task
continuity.
Faults A fault is an exception that can generally be corrected and that, once corrected,
allows the program to be restarted with no loss of continuity. When a fault is
reported, the processor restores the machine state to the state prior to the beginning
of execution of the faulting instruction. The return address (saved contents
of the CS and EIP registers) for the fault handler points to the faulting instruction,
rather than the instruction following the faulting instruction.
Note: There are a small subset of exceptions that are normally reported as
faults, but under architectural corner cases, they are not restartable and some
processor context will be lost. An example of these cases is the execution of the
POPAD instruction where the stack frame crosses over the the end of the stack
segment. The exception handler will see that the CS:EIP has been restored as
if the POPAD instruction had not executed however internal processor state
(general purpose registers) will have been modified. These corner cases are
considered programming errors and an application causeing this class of
exceptions will likely be terminated by the operating system.
Traps A trap is an exception that is reported immediately following the execution of
the trapping instruction. Traps allow execution of a program or task to be
continued without loss of program continuity. The return address for the trap
handler points to the instruction to be executed after the trapping instruction.
Aborts An abort is an exception that does not always report the precise location of the
instruction causing the exception and does not allow restart of the program or
task that caused the exception. Aborts are used to report severe errors, such as
hardware errors and inconsistent or illegal values in system tables
我們在操作系統的內存管理中常常看到的術語“page fault”,應該就是屬於這三種異常中的第一種：Fault。從紅色的語句中我們可以看出，page fault是可以恢復的，事實上，對於操作系統的內存管理來說“page fault”必須是可以恢復的，不然，操作系統的虛擬地址空間機制就沒有辦法實現了。
5.中斷和異常的處理之後（執行了handler）的指令執行策略
For fault-class exceptions, the return instruction pointer that the processor saves when it generates
the exception points to the faulting instruction. So, when a program or task is restarted
following the handling of a fault, the faulting instruction is restarted (re-executed). Restarting
the faulting instruction is commonly used to handle exceptions that are generated when access
to an operand is blocked. The most common example of a fault is a page-fault exception (#PF)
that occurs when a program or task references an operand in a page that is not in memory. When
a page-fault exception occurs, the exception handler can load the page into memory and resume
execution of the program or task by restarting the faulting instruction. To insure that this instruction
restart is handled transparently to the currently executing program or task, the processor
saves the necessary registers and stack pointers to allow it to restore itself to its state prior to the
execution of the faulting instruction.
For trap-class exceptions, the return instruction pointer points to the instruction following the
trapping instruction. If a trap is detected during an instruction which transfers execution, the
return instruction pointer reflects the transfer. For example, if a trap is detected while executing
a JMP instruction, the return instruction pointer points to the destination of the JMP instruction,
not to the next address past the JMP instruction. All trap exceptions allow program or task restart
with no loss of continuity. For example, the overflow exception is a trapping exception. Here,
the return instruction pointer points to the instruction following the INTO instruction that tested
the OF (overflow) flag in the EFLAGS register. The trap handler for this exception resolves the
overflow condition. Upon return from the trap handler, program or task execution continues at
the next instruction following the INTO instruction.
The abort-class exceptions do not support reliable restarting of the program or task. Abort
handlers generally are designed to collect diagnostic information about the state of the processor
when the abort exception occurred and then shut down the application and system as gracefully
as possible.
Interrupts rigorously(嚴格的) support restarting of interrupted programs and tasks without loss of continuity.
The return instruction pointer saved for an interrupt points to the next instruction to be
executed at the instruction boundary where the processor took the interrupt. If the instruction
just executed has a repeat prefix, the interrupt is taken at the end of the current iteration with the
registers set to execute the next iteration.
上文中的紅色語句說明了執行處理器(handler)之後，代碼該如何執行。其中abort-class exception 的異常不支持restart，所以發生該類異常時program or task一般就會退出或終止。
6.異常和中斷是可以被processor通過設置EFLAGS標誌寄存器來屏蔽的。
MOV SS, AX
MOV ESP, StackTop
例如以上指令在執行期間是不應該被中斷的，所以在執行MOV SS, AX時要屏蔽中斷和異常。
7.中斷和異常是有預定義的優先級的，所以當出現併發的中斷和異常時，processor通常根據其優先級來執行相應的處理器(handler)
8.IDTR寄存器和IDT（中斷向量表）
9.彙編語言中的中斷調用，以及CPU中與DOS,BIOS,以及外設(如：輸入設備：鼠標，鍵盤，輸出設備：顯示器，打印機等)的交互(功能調用)都是通過中斷機制來實現的。