STM32F0 單片機使用內部RC振盪器作爲系統，軟件修改

STM32F0 單片機使用內部RC振盪器作爲系統，軟件修改
系統上電覆位後，
運行如下
; Reset handler routine
Reset_Handler PROC
EXPORT Reset_Handler [WEAK]
IMPORT __main
IMPORT SystemInit
LDR R0, =SystemInit
BLX R0
LDR R0, =__main
BX R0
ENDP
然後進入 system_stm32f0xx.c 文件
在SystemInit函數裏有 SetSysClock(); ，我們修改這個函數即可

void SystemInit (void)
{
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;

#if defined (STM32F031) || defined (STM32F072) || defined (STM32F042)
/* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits /
RCC->CFGR &= (uint32_t)0xF8FFB80C;
#else
/ Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits /
RCC->CFGR &= (uint32_t)0x08FFB80C;
#endif / STM32F031*/

/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF; //1111 1110 1111 0110 1111 1111 1111 1111

/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;

/* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
RCC->CFGR &= (uint32_t)0xFFC0FFFF;

/* Reset PREDIV1[3:0] bits */
RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;

/* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;

/* Reset HSI14 bit */
RCC->CR2 &= (uint32_t)0xFFFFFFFE;

/* Disable all interrupts */
RCC->CIR = 0x00000000;

/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
SetSysClock();
}

在文件system_stm32f0xx.c下修改static void SetSysClock(void)
如下：
static void SetSysClock(void)
{
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;

/* SYSCLK, HCLK, PCLK configuration ----------------------------------------/
/ Enable HSI*/
RCC->CR |= ((uint32_t)RCC_CR_HSION); //RCC_CR_HSION,RCC_CR_HSEON

/* Wait till HSE is ready and if Time out is reached exit */
do
{
HSIStatus = RCC->CR & RCC_CR_HSIRDY;
StartUpCounter++;
} while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));

if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
{
HSIStatus = (uint32_t)0x01;
}
else
{
HSIStatus = (uint32_t)0x00;
}

if (HSIStatus == (uint32_t)0x01)
{
/* Enable Prefetch Buffer and set Flash Latency */
FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;

/* HCLK = SYSCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
  
/* PCLK = HCLK */
RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;

/* PLL configuration = HSE * 6 = 48 MHz */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2  | RCC_CFGR_PLLMULL12);
        
/* Enable PLL */
RCC->CR |= RCC_CR_PLLON;

/* Wait till PLL is ready */
while((RCC->CR & RCC_CR_PLLRDY) == 0)
{
}

/* Select PLL as system clock source */
RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    

/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
{
}

}
else
{ /* If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}