今天在百度上看到一則消息——
http://tieba.baidu.com/p/1362181987
IVY Bridge : There's more than 22nm
I named this title...this is a information that were said to be confirmed on Intel forums"
• Two instructions to support 16-bit floating-point data type conversion to and from single-precision floating-point type. Conversion to packed 16-bit floating-point values from packed single-precision floating-point values also provides rounding control using an immediate byte. These float-16 instructions convert packed data types of different sizes following the same manner as the 256-bit vector SIMD extension, AVX.
• One instruction that generates random numbers of 16/32/64 bit wide random
integers. The random number generator instruction operates on general-purpose registers.
• Four instructions that allow software working in 64-bit environment to read and write FS base and GS base registers in all privileged levels.
"From the point of view of marketing, this see***ike what they've done on Westmere, which they improved the register and buffer system , making it efficient for virtual machine.
Well, tecnically, this seems to be more important. B3Der once were discussing about how much will 16-bit floating-point vertex processing on Haswell speed up the graphics performance. Seems now it has advanced to IVY Bridge.
嘗試翻譯了一下——
1. 2條指令用於支持16位浮點和（32位）單精度浮點的轉換。（後面沒看明白，似乎還支持打包16位，同時還能用在AVX指令集中）
2. 1條指令用於生成 隨機的 16/32/64位整數。該指令能用於通用寄存器。
3. 4條指令允許軟件能在64位環境的任何訪問級下讀寫FS、GS寄存器。
對於消息真僞，我先利用Google搜索了一番，找到了一個帖子——
http://208.65.201.106/showthread.php?p=32834403
Yesterday, 12:01 PM #118
CPUarchitect
Member
Join Date: Jun 2011
Posts: 48 --------------------------------------------------------------------------------Quote: Oh really? IVY starts to support 16bit floating point?
Yes, according to the AVX software programming interface, and confirmed in the Intel forums, Ivy Bridge adds:
• Two instructions to support 16-bit floating-point data type conversion to and from single-precision floating-point type. Conversion to packed 16-bit floating-point values from packed single-precision floating-point values also provides rounding control using an immediate byte. These float-16 instructions convert packed data types of different sizes following the same manner as the 256-bit vector SIMD extension, AVX.
• One instruction that generates random numbers of 16/32/64 bit wide random
integers. The random number generator instruction operates on general-purpose registers.
• Four instructions that allow software working in 64-bit environment to read and write FS base and GS base registers in all privileged levels.Only in case a bug is detected they might pull out support for these instructions, which is not likely to happen.
Quote: Also I'd like to ask..Isn't the AVX Shuffle in Sandy Bridge is a parallel memory operation, which is a part of "AVX 1.0"?
No, none of the AVX1 shuffle instructions allow access to non-sequential memory locations.
內容大同小異，有一定的可信度。
但我還是不放心，又去查intel文檔，最終找到了——
