ArtyA7的Hello Word創建Microblaze嵌入式系統硬件工程的問題解決

[Timing 38-282] The design failed to meet the timing requirements.

[Timing 38-469] The REFCLK pin of IDELAYCTRL Sytem_i/mig_7series_0/u_Sytem_mig_7series_0_0_mig/u_iod

[Timing 38-282] The design failed to meet the timing requirements.
[Timing 38-469] The REFCLK pin of IDELAYCTRL

Sytem_i/mig_7series_0/u_Sytem_mig_7series_0_0_mig/u_iod
在使用Arty A7板子開發時，慘考帖子【Arty-A7入門連載】Vivado中爲Arty A7創建MicroBlaze嵌入式系統硬件工程會有上面的錯誤，原因是教程中說的接線錯了，要按照圖片中的接線，mig_7series_0的clk_ref_i需要接clk_wiz_0的clk_out2，同時sys_clk_i需要接clk_out1,這篇教程在這裏弄反了，評論區也有人指出，大家不要接錯哈。