關於zynq的中斷述,在網上和datesheet中已經有詳細的說明,但是在3.X的內核中,開始用dts來詳細所有device的infor和source,這裏就有關於中斷號的指定,但是在關於zynq的dts文件中,我們看到指定的中斷號不是datesheet上說所的Id,但是在proc下,我們可以看到每個設備的中斷號對應關係:
zynq> more /proc/interrupts
CPU0 CPU1
27: 0 0 GIC 27 gt
29: 233 282 GIC 29 twd
35: 0 0 GIC 35 f800c000.ps7-ocmc
39: 2 0 GIC 39 f8007100.ps7-xadc
40: 0 0 GIC 40 f8007000.ps7-dev-cfg
43: 530 0 GIC 43 ttc_clockevent
45: 0 0 GIC 45 f8003000.ps7-dma
46: 0 0 GIC 46 f8003000.ps7-dma
47: 0 0 GIC 47 f8003000.ps7-dma
48: 0 0 GIC 48 f8003000.ps7-dma
49: 0 0 GIC 49 f8003000.ps7-dma
51: 10 0 GIC 51 e000d000.ps7-qspi
53: 0 0 GIC 53 ehci_hcd:usb1
54: 0 0 GIC 54 eth0
56: 35 0 GIC 56 mmc0
72: 0 0 GIC 72 f8003000.ps7-dma
73: 0 0 GIC 73 f8003000.ps7-dma
74: 0 0 GIC 74 f8003000.ps7-dma
75: 0 0 GIC 75 f8003000.ps7-dma
82: 68 0 GIC 82 xuartps
IPI1: 0 495 Timer broadcast interrupts
IPI2: 1187 1239 Rescheduling interrupts
IPI3: 0 0 Function call interrupts
IPI4: 16 80 Single function call interrupts
IPI5: 0 0 CPU stop interrupts
IPI6: 42 23 IRQ work interrupts
IPI7: 0 0 completion interrupts
Err: 0
zynq>
在datesheet中,我們可以看到與上面的表述是相對應的:
這裏是相對應的,如eth0的中斷號爲54,但是在dts中關於interrupte的指定如下,如關於eth0的表述:
ps7_ethernet_0: ps7-ethernet@e000b000 {
#address-cells = <1>;
#size-cells = <0>;
clock-names = "ref_clk", "aper_clk";
clocks = <&clkc 13>, <&clkc 30>;
compatible = "xlnx,ps7-ethernet-1.00.a";
interrupt-parent = <&ps7_scugic_0>;
interrupts = <0 22 4>;
local-mac-address = [00 0a 35 00 00 00];
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
reg = <0xe000b000 0x1000>;
xlnx,eth-mode = <0x1>;
xlnx,has-mdio = <0x1>;
xlnx,ptp-enet-clock = <111111115>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@0 {
compatible = "marvell,88e1510";
device_type = "ethernet-phy";
reg = <0>;
} ;
} ;
} ;
這裏指定中斷的類型爲SPI,中斷號爲22,中斷是高電平觸發。這裏指定的中斷號22,其實不是datesheet上指定的中斷號,而是用的對應在spi_status寄存器中的序號,eth0是在spi_status_0中的bit22,所以這裏就指定爲中斷號爲22,如果是在spi_status_1中的22,這中斷號就是32+22=54.