AGM’s Tensor processing unit (TPU) is inferencing ASIC logic core built with dedicated logic(full custom) including systolic matrix computation interacting with fast memory, controller, and software such as configuration and commanding feeder software. Deployed technologies such as math and memory functions are derived and optimized ASIC from volume shipping FPGA products. Convolution computational core (array size) is scalable by requests. The configuration software is able to also serve as limited functions as full-mask tapeout’s metal changes . The licensing ASIC core is dedicated high computation power and low power consumption, suited for integration into SoC products.
AGM的Tensor处理单元（TPU）推断出具有专用逻辑（完全定制）的ASIC逻辑内核，其中包括与快速存储器，控制器以及诸如配置和命令馈送软件之类的软件交互的脉动矩阵计算。诸如数学和存储器功能之类的已部署技术是从批量出货的FPGA产品中派生和优化的ASIC。
卷积计算核心（数组大小）可以根据请求进行扩展。
配置软件还可以充当有限功能，如全掩膜流片的金属变化。
授权的ASIC内核具有专用的高计算能力和低功耗，适合集成到SoC产品中。
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