字節對齊及why

32位系統默認4字節對齊（字段大小小於4字節時，以最大的字段大小對齊，字段大小大於等於4字節時以4字節對齊）：

因爲地址總線的關係，有2根總線不參與尋址，導致只能獲取到4的整數倍的地址，所以默認是4字節對齊。

指針大小: 4個字節(32位機的尋址空間是4個字節）。

class DBase{
  //double b;
  char c;
  //int a;
};

Class DBase
   size=1 align=1   //內存大小小於4字節時，以最大的字節對齊
   base size=1 base align=1
DBase (0x7fd0dcd3fc40) 0
 

class DBase{
  //double b;
  char c;
 short d;
  //int a;
};

Class DBase
   size=4 align=2
   base size=4 base align=2
DBase (0x7fe1be2f0d20) 0

 

class DBase{
  //double b;
  int a;
}; //cout<<sizeof(DBase)<<endl; // 4
Class DBase
   size=4 align=4
   base size=4 base align=4
DBase (0x7f5c45c6fc40) 0

 

class DBase{
  double b; //字段大小超4字節
  int a;
};

Class DBase
   size=12 align=4
   base size=12 base align=4
DBase (0x7fbff5093c40) 0

 

64位系統默認8字節對齊：《The Intel 64 and IA-32 Architectures Software Developer's Manual》

（字段大小小於8字節時，以最大的字段大小對齊，字段大小大於等於8字節時以8字節對齊）

指針大小： 8個字節

爲了性能考慮，8字節的數據需要8字節對齊和cpu緩衝命中率有關係

There are multiple hardware components that may be adversely affected by unaligned loads or stores.

• The interface to memory might be eight bytes wide and only able to access memory at multiples of eight bytes. Loading an unaligned eight-byte double then requires two reads on the bus. Stores are worse, because an aligned eight-byte store can simply write eight bytes to memory, but an unaligned eight-byte store must read two eight-byte pieces, merge the new data with the old data, and write two eight-byte pieces.  內存訪問接口的限制，只能以8字節及8字節整數倍，非8字節對齊的數據要讀兩次（讀取效率上考慮），而且在存儲上不以8字節對齊更加麻煩，影響效率。
• Cache lines are typically 32 or 64 bytes. If eight-byte objects are aligned to multiples of eight bytes, then each object is in just one cache line. If they are unaligned, then some of the objects are partly in one cache line and partly in another. Loading or storing these objects then requires using two cache lines instead of one. This effect occurs at all levels of cache (three levels is not uncommon in modern processors).3個級別的處理總線很普遍，而在高速緩存線路上目前主要是32字節或64字節型，如果不對齊將導致一些對象的內存部分在一個線路上，而另一部分在另一個線路上。這將導致加載和存儲複雜而低效。
• Memory system pages are typically 512 bytes or more. Again, each aligned object is in just one page, but some unaligned objects are in multiple pages. Each page that is accessed requires hardware resources: The virtual address must be translated to a physical address, this may require accessing translation tables, and address collisions must be detected. (Processors may have multiple load and store operations in operation simultaneously. Even though your program may appear to be single-threaded, the processor reads instructions in advance and tries to execute those that it can. So a processor may start a load instruction before preceding instructions have completed. However, to be sure this does not cause an error, the processor checks each load instruction to be sure it is not loading from an address that a prior store instruction is changing. If an access crosses a page boundary, the two parts of the loaded data have to be checked separately.) 系統頁大小512，或更大，如果不對齊將導致更多的數據分佈在不同的內存頁，每個頁的訪問都需要消耗硬件資源。巴拉巴拉總之就是資源和性能的問題

class DBase{
  //double b;
  char c;
  //int a;
};

Class DBase
   size=1 align=1
   base size=1 base align=1
DBase (0x7f462135fd20) 0

 

class DBase{
  //double b;
  int a;
};////cout<<sizeof(DBase)<<endl; // 4

Class DBase
   size=4 align=4 //字段最大爲4，故以4字節對齊
   base size=4 base align=4
DBase (0x7f9b7275cd20) 0

 class DBase{
  double b;
  int a;
};

Class DBase
   size=16 align=8  //8字節對齊
   base size=12 base align=8
DBase (0x7fb6489fcd20) 0