The CLOCK system is an essential/fundamental component of any computer system. This post is used to depict:
1. The architect of TCC8935's CLOCK system
2. The device driver.
HARDWARE architecture:
Telechips names the CLOCK subsystem as CKC block. The CKC block generates all necessary bus and peripheral clocks used in 8935.
clock source:
8935 has total 11 clock sources, they are:
XIN: clock signal from PMU (12MHz fixed)
XTIN: clock signal from RTC
HDMI_CLKO_27M: clock signal from HDMI oscillator (HDMI_XI, 27MHz)
HDMI_CLKO_PCLK: clock signal from HDMI phy (video clock)
HDMI_CLKO_TMDS: clock signal from HDMI phy (TMDS clock)
PLL0 - PLL5: clock signals derived from XIN.
target clock:
Telechips divides all target clocks into 2 categories:
a. Bus clocks (fclk)
Fcpu: CPU clock frequency
Fmbus: memory bus clock
Fdbus: Display bus clock
Fgbus: Graphic bus clock
Fiobus: I/O bus clock
Fvbus: Core clock for Video bus (moving video only)
Fvcod: Bus clock for video bus (Video codec)
Fsmu: Bus clock for System Management Unit
Fg2d: Graphic 2D clock for Display bus (overlay mixer only)
Fcm3bus Bus clock for Cortex-M3 bus.
b. Peripheral clocks (pclk)
All (11) bus clocks are generated from 16 clock sources: 6xPLLs, XIN, XTIN and there divider partners, see below figure:
Peripheral clocks are generated from 19 clock sources, includes 6xPLLs, XIN, XTIN and there divider partners as well as 3 HDMI clock sources, see below figure:
The Device Driver:
To facilitate operations on clocks, telechips developed a device driver: arch/arm/mach-tcc893x/clock.c
The driver does below things:
1. Creates a proc interface (/proc/clocks) to let users brows/set clocks.
2. Exports interfaces to kernel to get/set clocks.
3. Defines each clocks with system and organizes them as a list.
Every clock is defined by structure clk, which is defined in arch/arm/mach-tcc893x/include/mach/clock.h:
struct clk {
struct list_head list;
unsigned int id;
const char *name;
struct clk *parent;
struct device *dev;
unsigned long rate; // requested rate
unsigned long real_rate; // setted rate
unsigned int flags;
int usecount;
unsigned long (*get_rate)(struct clk *);
int (*set_rate)(struct clk *, unsigned long);
int (*enable)(struct clk *);
void (*disable)(struct clk *);
unsigned int pwdn_idx;
int (*pwdn)(unsigned int, unsigned int);
unsigned int swreset_idx;
int (*swreset)(unsigned int, unsigned int);
unsigned int clock_idx;
int (*clock)(unsigned int, unsigned int);
};
2 examples are:
static struct clk clk_vbus = {
.name = "vbus",
.flags = CLK_AUTO_OFF,
.enable = fclk_enable,
.disable = fclk_disable,
.set_rate = fclk_set_rate,
.get_rate = fclk_get_rate,
.pwdn_idx = FBUS_VBUS,
.pwdn = tca_ckc_setfbuspwdn,
.swreset_idx = FBUS_VBUS,
.swreset = tca_ckc_setfbusswreset,
.clock_idx = FBUS_VBUS,
.clock = tca_ckc_fclk_enable,
};
and
static struct clk clk_lcdc = {
.name = "lcdc",
.parent = &clk_ddi,
.flags = CLK_AUTO_OFF,
.enable = pclk_enable,
.disable = pclk_disable,
.pwdn_idx = DDIBUS_VIOC,
.pwdn = tca_ckc_setddipwdn,
.swreset_idx = DDIBUS_VIOC,
.swreset = tca_ckc_setddiswreset,
};
As per the name/parent/flags filed of each clocks' instance, we can get an overview of TCC8935 clocks:
Note that the "parent" filed is used to indicate a "blongs-to" relationship between 2 clock objects. It has nothing to do with both the father/child frequencies.
In other words, we need to setup father / child 's frequency without considering that of its partner's. On the other hand, we have to consider it's partner if we want to enable/disable either one.
For example, all children's clock's must be disabled before disabling their parent's clock..
Terms:
A:
B:
C:
cipher:
D:
dmax:
E:
ecid:
ehi:
edi: External Device Interface on IO bus.
F:
G:
g2d: Graphic 2D. In 8935, It means Overlay Mixer on DDI bus.
H:
I:
J:
K:
L:
lcd_timer:
lcdsi:
M:
mpefec: The MPEFEC module on IO bus. The MPEFEC(Multi-Protocol Encapsulation Forward Error Correction) is a error correction method in DVB-H standard.
N:
nfc: Nand Flash Controller on IO bus.
O:
OTP: One Time Programmable. It stands for OTP ROM Controller on MEM bus.
P:
pdm: PDM controller on ...
Q:
R:
S:
smc: Static Memory Controller on IO bus.
sdhc: SD/SDIO/MMC Host Controller on IO bus.
T:
tsadc: TSADC interface on IO bus.
U:
V:
vdac: Video DAC.
W:
X:
Y:
Z: