arch/arm/include/asm/cputype.h
arch/arm/kernel/setup.c
1. read_cpuid_id(CPUID_ID)
#define read_cpuid(reg) \
({ \
unsigned int __val; \
asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
: "=r" (__val) \
: \
: "cc"); \
__val; \
})
讀取MIDR寄存器
#define ARM_CPU_PART_CORTEX_A9 0xC090
#define ARM_CPU_PART_CORTEX_A5 0xC050
#define ARM_CPU_PART_CORTEX_A15 0xC0F0
#define ARM_CPU_PART_CORTEX_A7 0xC070
#define ARM_CPU_PART_CORTEX_A12 0xC0D0
cat /proc/cpuinfo
Processor : ARMv7 Processor rev 1 (v7l)
processor : 0
model name : ARMv7 Processor rev 1 (v7l)
BogoMIPS : 48.00
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 evtstrm
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc0d
CPU revision : 1
processor : 1
model name : ARMv7 Processor rev 1 (v7l)
BogoMIPS : 48.00
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 evtstrm
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc0d
CPU revision : 1
processor : 2
model name : ARMv7 Processor rev 1 (v7l)
BogoMIPS : 48.00
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 evtstrm
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x0
CPU part : 0xc0d
CPU revision : 1
Hardware : SOMETHING (Flattened Device Tree)
Revision : 0000 (由板級實現，可以存儲在cpld，gpio控制，flash等）
Serial : 0000000000000000 (板級實現可以，omap用來標示die id)