RISC-V處理器 蜂鳥e203 core_exu_alu_rglr 源碼添加註釋

首次添加2019.3.28，計劃繼續補充修改

 //  This module to implement the regular ALU instructions
//
//
// ====================================================================
`include "e203_defines.v"

module e203_exu_alu_rglr(

  //////////////////////////////////////////////////////////////
  //////////////////////////////////////////////////////////////
  // The Handshake Interface 
  //
  input  alu_i_valid, // Handshake valid寫入使能
  output alu_i_ready, // Handshake ready寫入準備就緒
  //E203_XLEN32bit
  input  [`E203_XLEN-1:0] alu_i_rs1,
  input  [`E203_XLEN-1:0] alu_i_rs2,
  input  [`E203_XLEN-1:0] alu_i_imm,
  input  [`E203_PC_SIZE-1:0] alu_i_pc,
  //當前E203_DECINFO_ALU_WIDTH爲21[20：0]，此項爲從info總線取到的數據
  input  [`E203_DECINFO_ALU_WIDTH-1:0] alu_i_info,

  //////////////////////////////////////////////////////////////
  //////////////////////////////////////////////////////////////
  // The ALU Write-back/Commit Interface
  output alu_o_valid, // Handshake valid輸出使能
  input  alu_o_ready, // Handshake ready輸出就緒或完成
  // The Write-Back Interface for Special (unaligned ldst and AMO instructions) 
  output [`E203_XLEN-1:0] alu_o_wbck_wdat,//連接至數據通路返回的結果，即寫回的數據
  output alu_o_wbck_err,   
  output alu_o_cmt_ecall,   
  output alu_o_cmt_ebreak,   
  output alu_o_cmt_wfi,   


  //////////////////////////////////////////////////////////////
  //////////////////////////////////////////////////////////////
  // To share the ALU datapath將發送至數據通路的數據
  // 
  // The operands and info to ALU
  output alu_req_alu_add ,
  output alu_req_alu_sub ,
  output alu_req_alu_xor ,
  output alu_req_alu_sll ,
  output alu_req_alu_srl ,
  output alu_req_alu_sra ,
  output alu_req_alu_or  ,
  output alu_req_alu_and ,
  output alu_req_alu_slt ,
  output alu_req_alu_sltu,
  output alu_req_alu_lui ,
  output [`E203_XLEN-1:0] alu_req_alu_op1,//兩個源操作數
  output [`E203_XLEN-1:0] alu_req_alu_op2,


  input  [`E203_XLEN-1:0] alu_req_alu_res,//從數據通路模塊取回的結果

  input  clk,
  input  rst_n
  );

  wire op1pc   = alu_i_info [`E203_DECINFO_ALU_OP1PC  ];//判定第一個源操作數是否使用PC 16:16
  wire op2imm  = alu_i_info [`E203_DECINFO_ALU_OP2IMM ];//判定第二個源操作數是否爲立即數 15:15
  
  assign alu_req_alu_op1  = op1pc  ? alu_i_pc  : alu_i_rs1;//兩個源操作數
  assign alu_req_alu_op2  = op2imm ? alu_i_imm : alu_i_rs2;

  wire nop    = alu_i_info [`E203_DECINFO_ALU_NOP ] ;//17:17
  wire ecall  = alu_i_info [`E203_DECINFO_ALU_ECAL ];//18:18
  wire ebreak = alu_i_info [`E203_DECINFO_ALU_EBRK ];//19:19
  wire wfi    = alu_i_info [`E203_DECINFO_ALU_WFI ];//20:20

     // The NOP is encoded as ADDI, so need to uncheck it
  assign alu_req_alu_add  = alu_i_info [`E203_DECINFO_ALU_ADD ] & (~nop);//4:4
  assign alu_req_alu_sub  = alu_i_info [`E203_DECINFO_ALU_SUB ];//5:5
  assign alu_req_alu_xor  = alu_i_info [`E203_DECINFO_ALU_XOR ];//6:6
  assign alu_req_alu_sll  = alu_i_info [`E203_DECINFO_ALU_SLL ];//7
  assign alu_req_alu_srl  = alu_i_info [`E203_DECINFO_ALU_SRL ];//8
  assign alu_req_alu_sra  = alu_i_info [`E203_DECINFO_ALU_SRA ];//9
  assign alu_req_alu_or   = alu_i_info [`E203_DECINFO_ALU_OR  ];//10
  assign alu_req_alu_and  = alu_i_info [`E203_DECINFO_ALU_AND ];//11
  assign alu_req_alu_slt  = alu_i_info [`E203_DECINFO_ALU_SLT ];//12
  assign alu_req_alu_sltu = alu_i_info [`E203_DECINFO_ALU_SLTU];//13
  assign alu_req_alu_lui  = alu_i_info [`E203_DECINFO_ALU_LUI ];//14:14

  assign alu_o_valid = alu_i_valid;//根據輸入使能得到輸出使能                             
  assign alu_i_ready = alu_o_ready;//
  assign alu_o_wbck_wdat = alu_req_alu_res;//將從數據通路取回的數據輸出

  assign alu_o_cmt_ecall  = ecall;   
  assign alu_o_cmt_ebreak = ebreak;   
  assign alu_o_cmt_wfi = wfi;   
  
  // The exception or error result cannot write-back
  assign alu_o_wbck_err = alu_o_cmt_ecall | alu_o_cmt_ebreak | alu_o_cmt_wfi;

endmodule