部分內容來自
<<COMPUTER ORGANIZATION AND ARCHITECTURE-DESIGNING FOR PERFORMANCE>> by William Stallings
整數表示(Integer representation)
Sign-Magnitude Representation
符號-量級表示法
對於n位的數,最左邊的一位代表符號位,接下來的n-1位代表量級( 絕對值大小)
The simplest form of representation that employs a sign bit is the sign-magnitude representation. In an n-bit word, the rightmost bits hold the magnitude of
the integer.
這種方法有幾種缺陷。一種是加法與減法操作既要考慮符號又要考慮量級,另外0的表示有兩種。
+0=00000000
-0=10000000
因此ALU裏面幾乎不會使用這種表示方法(符號-量級法)
二的補碼錶示 (Twos Complement Representation)
最左邊一位也是符號位(0爲正數,1爲負數)
該表示中減法操作可以轉化爲加法操作
(Negation):
Take the Boolean complement of each bit of the corresponding positive number, then add 1 to the resulting bit pattern viewed
as an unsigned integer.
To subtract B from A, take the twos complement of B and addit to A.
比如A-B相當於A加上B的補碼(B按位取反加1)
最高有效位(most significant bit)權重爲-2^(n-1)
Negation(取反/取負):
1. Take the Boolean complement of each bit of the integer (including the sign bit).That is, set each 1 to 0 and each 0 to 1.
2. Treating the result as an unsigned binary integer, add 1.
總體思想便是按位取反加1
減法操作
比如
2-7
0010-0111
減法轉化成加法
0111取(TWOs complement)按位取反加1結果爲1001
0010+1001=1011=-5