001 Xilinx FPGA、Soc

FPGA

產品組合

從低端到高端：SPARTAN、ARTIX、KINTEX、VIRTEX

7 Series Families Comparison

對比

• SPARTAN： 低成本，最低功耗
• ARTIX： 低成本，高吞吐量
• KINTEX： 最佳性價比，2X性能改善
• VIRTEX： 最高的系統性能和容量，2X性能改善

概述

• 6-input lookup table (LUT)
• 36 Kb dual-port block RAM with built-in FIFO
• DDR3（up to 1,866 Mb/s）
• multi-gigabit transceivers（6.6 Gb/s up to 28.05 Gb/s）
• user configurable analog interface (XADC)（1MSPS，millions of samples per second）
• DSP slices with 25 x 18 multiplier, 48-bit accumulator
• Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
• PCI Express® (PCIe)
• 256-bit AES encryption with HMAC/SHA-256 authentication， SEU detection and correction
• high performance and lowest power
  
• GMAC/s： giga multiply-accumulates per second
• DMIPs： Dhrystone MIPS (Million Instructions per Second)

器件示例

• FPGA Slice： contains 4 LUTs and 8 flip-flops; only some slices can use their LUTs as distributed RAM or SRLs
• DSP slice： a pre-adder, a 25 x 18 multiplier, an adder, and an accumulator
• CMTs： Each CMT contains one MMCM and one PLL
• Super logic regions (SLRs)： the constituent parts of FPGAs that use SSI technology

LUTs，Slices，CLBs

• LUT： 6-input lookup table（64-bit ROMs、2 * 32-bit ROMs）
• Slice： 4 LUTs，8 flip-flops，multiplexers and arithmetic carry logic
• CLB： 2 slices

Ordering Information

Soc

產品組合

https://www.xilinx.com
https://www.xilinx.com/support/documentation/data_sheets/ds180_7Series_Overview.pdf
https://www.xilinx.com/support/documentation/selection-guides/7-series-product-selection-guide.pdf
https://www.xilinx.com/products/silicon-devices/soc.html