linux音頻alsa驅動文檔閱讀之四 數字音頻接口

轉自:http://blog.chinaunix.net/uid-22917448-id-1765505.html

ASoC currently supports the three main Digital Audio Interfaces (DAI) found on

SoC controllers and portable audio CODECs today, namely AC97, I2S and PCM.
ASoC現在支持如今的SoC控制器和便攜音頻解碼器上的三個主要數字音頻接口,即AC97,I2S,PCM。


AC97
AC97
====

  AC97 is a five wire interface commonly found on many PC sound cards. It is
now also popular in many portable devices. This DAI has a reset line and time
multiplexes its data on its SDATA_OUT (playback) and SDATA_IN (capture) lines.
The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97
frame is 21uS long and is divided into 13 time slots.
AC97是一種個人電腦聲卡上常見的五線接口。現在在很多便攜設備中也很流行。這個數字音頻接口有一個復位線,分時在SDATA_OUT(回放)和SDATA_IN(捕獲)線上傳送數據。位時鐘常由解碼器驅動(通常是12.288MHz).幀時鐘(通常48kHz)總是由控制器驅動。每個AC97幀21uS,並分爲13個時間槽。


The AC97 specification can be found at :-
AC97說明書可以在下面的網址找到:
http://www.intel.com/design/chipsets/audio/ac97_r23.pdf



I2S
I2S
===

I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
Rx lines are used for audio transmission, whilst the bit clock (BCLK) and
left/right clock (LRC) synchronise the link. I2S is flexible in that either the
controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
usually varies depending on the sample rate and the master system clock
(SYSCLK). LRCLK is the same as the sample rate. A few devices support separate
ADC and DAC LRCLKs, this allows for simultaneous capture and playback at
different sample rates.
I2S是一個4線數字音頻接口,常用於HiFi,STB便攜設備。Tx  和Rx信號線用於音頻傳輸。而位時鐘和左右時鐘(LRC)用於同步鏈接。I2S具有靈活性,因爲控制器和解碼器都可以控制位時鐘和左右時鐘。位時鐘因採樣率和主系統時鐘而有不同。LRCLK與採樣率相同。少數設備支持獨立的ADC和DAC的LRCLK。這使在不同採樣率情況下同步捕獲和回放成爲可能。

I2S has several different operating modes:-
I2S有幾個不同的操作模式

o I2S - MSB is transmitted on the falling edge of the first BCLK after LRC
         transition.
I2S模式-MSB在LRC後的第一個位時鐘的下降沿傳送。

o Left Justified - MSB is transmitted on transition of LRC.
左對齊模式:MSB在LRC傳送時傳送。

o Right Justified - MSB is transmitted sample size BCLKs before LRC
                     transition.
右對齊模式:MSB在(此句不懂)

PCM
PCM
===

PCM is another 4 wire interface, very similar to I2S, which can support a more
flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
to synchronise the link whilst the Tx and Rx lines are used to transmit and
receive the audio data. Bit clock usually varies depending on sample rate
whilst sync runs at the sample rate. PCM also supports Time Division
Multiplexing (TDM) in that several devices can use the bus simultaneously (this
is sometimes referred to as network mode).
PCM也是一種4線制接口。與I2S非常相像,但支持一個更靈活的協議。它有位時鐘(BCLK)和同步時鐘 (SYNC)用來在Tx和Rx在傳送和接收音頻數據是同步連接。位時鐘通常因採樣率的不同而不同,然而同步時鐘(SYNC)與採樣頻率相同。PCM同樣支 持時分複用,可以幾個設備同時使用總線(這有時被稱爲net work 模式)。

Common PCM operating modes:-
常用的PCM操作模式:

o Mode A - MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
模式A-MSB在FRAME/SYNC後第一個BCLK的下降沿傳送。

o Mode B - MSB is transmitted on rising edge of FRAME/SYNC.
模式B-MSB在FRAME/SYNC的上升沿傳送。

L3-interface是一種串行接口,最常見的實例是UDA1341TS中連接microcontroller和UDA1341TS的接口。
  當然,L3有3根引腳:
  · L3DATA: microcontroller interface data line
  · L3MODE: microcontroller interface mode line
  · L3CLOCK: microcontroller interface clock line.
  擁有地址模式和數據傳輸模式。
  更多參考UDA1341TS datasheet
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