1.無符號數轉化爲有符號數
input [9:0] DAT_ADC ;
output [9:0] DOUT ;
reg signed [9:0] DOUT ;
always @ (posedge CLK_ADC) begin
DOUT <= DAT_ADC - 2^a ;
end
a爲輸入位寬
2.有符號數轉化爲無符號數
input [12-1:0] DATIN ;
output [12-1:0] DAT2DAC ;
reg [12-1:0] DAT2DAC ;
reg [12-1:0] datin_R1;
always @ (posedge CLKIN) begin
datin_R1 [11: 0] <= {1'b1,DATIN[11:1]} - DATIN[11]*2^a;
DAT2DAC <= datin_R1 ;
end
a爲輸入位寬