實用Makefile

頂層Makefile


# 頂層Makefile,負責聲明編譯標誌以及調用Makefile.build

CROSS_COMPILE = arm-linux-
AS		= $(CROSS_COMPILE)as
LD		= $(CROSS_COMPILE)ld
CC		= $(CROSS_COMPILE)gcc
CPP		= $(CC) -E
AR		= $(CROSS_COMPILE)ar
NM		= $(CROSS_COMPILE)nm
STRIP   = $(CROSS_COMPILE)strip
OBJCOPY	= $(CROSS_COMPILE)objcopy
OBJDUMP	= $(CROSS_COMPILE)objdump
export AS LD CC CPP AR NM
export STRIP OBJCOPY OBJDUMP

CFLAGS := -Wall -O2 -g
CFLAGS += -I$(shell pwd)/include
LDFLAGS := -lm -lfreetype -lts
export CFLAGS LDFLAGS

TOPDIR := $(shell pwd)
export TOPDIR

obj-y += main.o
obj-y += draw/
obj-y += disp/
obj-y += font/
obj-y += encoding/
obj-y += input/

TARGET := dig_book

all :
	make -C ./ -f $(TOPDIR)/Makefile.build
	$(CC) $(LDFLAGS) -o $(TARGET) build-in.o

clean :
	rm -f $(shell find -name "*.o")
	rm -f $(TARGET)

distclean :
	rm -f $(shell find -name "*.o")
	rm -f $(shell find -name "*.d")
	rm -f $(TARGET)

Makefile.build

# 本文件的最終目標
__build :

obj-y := 
subdir-y := 

# 引入各個Makefile中聲明的obj-y
include Makefile

# 在子目錄中調用Makefile.build
subdir-y    += $(patsubst %/, %, $(filter %/, $(obj-y)))

cur_objs-y  := $(filter-out %/, $(obj-y))
subdir_objs-y := $(foreach f, $(subdir-y), $(f)/build-in.o)


dep_files   := $(foreach f, $(cur_objs-y), .$(f).d)
dep_files   := $(wildcard $(dep_files))
ifneq ($(dep_files), )
    include $(dep_files)
endif

__build : $(subdir-y) build-in.o

# 在這裏聲明僞目標,確認每次編譯都進入子目錄調用Makefile.build
.PHONY :  $(subdir-y)
$(subdir-y) :
	make -C $@ -f $(TOPDIR)/Makefile.build

build-in.o : $(cur_objs-y) $(subdir_objs-y)
	$(LD) -r -o $@ $^

%.o : %.c
	$(CC) $(CFLAGS) -Wp,-MD,[email protected] -c -o $@ $<

子目錄Makefile

obj-y += freetype.o
obj-y += gbk.o
obj-y += ascii.o
obj-y += font_manager.o

include 與 -include

使用“-include”當包含的文件不存在時,make將忽略此錯誤。

僞目標.PHONY作用

①防止源文件目錄下有同名文件,如“clean”
②優化,因爲僞目標一般都不是由文件生成,可以跳過文件搜索

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