How to Read TLB Entries on Intel Arch?

First, do you know what TLB is? It caches latest address translation,
correct? Thus, by doing the function call, it is likely that new
virtual address needs to be translated to physical address, right?
And...where do you think it will end up? TLB again, right?

And since TLB size is not that big...guess how it manages itself in
that situation.... again ...simple...FIFO.... or anything like
that...but you get the basic message.



But its 100% possible in MIPS
 since the priviledged code in MIPS doesn't need TLB mappings.