OCxREF signal 作爲捕捉比較的定製化參考波形在對輸出波形的配置上佔有巨大的影響。如何將這個信號和外部輸入的事件聯繫起來，能給系統的設計帶來更多的可選擇性。
The OCxREF signal for a given channel can be driven Low by applying a High level to the ETRF（ETRF：External Trigger input） input (OCxCE enable bit of the corresponding TIMx_CCMRx register set to ‘1’).
The OCxREF signal remains Low until the next update event, UEV, occurs.
This function can only be used in output compare and PWM modes, and does not work in forced mode.
For example, the ETR signal can be connected to the output of a comparator to be used for current handling.
In this case, the ETR must be configured as follow:
1. The External Trigger Prescaler should be kept off: bits ETPS[1:0] of the TIMx_SMCR register set to ‘00’.
2. The external clock mode 2 must be disabled: bit ECE of the TIMx_SMCR register set to ‘0’.
3. The External Trigger Polarity (ETP) and the External Trigger Filter (ETF) can be configured according to the user needs.
Figure 90 shows the behavior of the OCxREF signal when the ETRF Input becomes High, for both values of the enable bit OCxCE. In this example, the timer TIMx is programmed in PWM mode.
參考：
STM32 - 定時器的設定 - 基礎- 02 - Capture/compare channels 和相關設置寄存器
https://blog.csdn.net/yellow_hill/article/details/102083981