PCI-Express(peripheral component interconnect express)是一種高速串行計算機擴展總線標準，是由英特爾在2001年提出的。PCIe屬於高速串行點對點雙通道高帶寬傳輸，所連接的設備分配獨享通道帶寬，不共享總線帶寬，主要支持主動電源管理，錯誤報告，端對端的可靠性傳輸，熱插拔以及服務質量(QOS)等功能。是PCI的更高發展，PCIe比以前的標準有許多改進，包括更高的最大系統總線吞吐量，更低的I/O引腳數量和更小的物理尺寸，更好的總線設備性能縮放，更詳細的錯誤檢測和報告機制（高級錯誤報告，AER）和本機熱插拔功能。PCIe標準的更新版本爲I/O虛擬化提供了硬件支持。PCIe的主要優勢在於其減少延遲的能力。PCIe設備和PCIe總線直接相連，使緩存和數據更接近CPU。他們消除了傳統存儲協議的開銷，並且EMC公司認爲在合適的條件下能實現遠遠優於從08年開始銷售的串列SCSI和SATA的固態硬盤SSD的性能。
在概念上，PCI Express總線是較舊的PCI/ PCI-X總線的高速串行替換。PCI Express總線與舊PCI之間的主要區別之一是總線拓撲。 PCI使用共享並行總線架構，其中PCI主機和所有設備共享一組通用的地址，數據和控制線。 相比之下，PCI Express基於點到點拓撲，單獨的串行鏈路將每個設備連接到根系統（主機）。 由於其共享總線拓撲，可以對單個方向上的PCI總線進行仲裁（在多個主機的情況下），並且一次限制爲一個主機。 此外，舊的PCI時鐘方案將總線時鐘限制在總線上最慢的外設（不管總線事務中涉及的設備如何）。 相比之下，PCI Express總線鏈路支持任何兩個端點之間的全雙工通信，同時跨多個端點的併發訪問沒有固有的限制。PCI插槽和PCI Express插槽不可互換。
單通道PCI Express（×1）卡可以插入多通道插槽（×4，×8等），初始化週期自動協商最高相互支持的通道數。該鏈接可以動態地自動配置自己，以便使用較少的通道，在存在不良或不可靠的通道的情況下提供故障容限。
多通道串行設計增加了靈活性，其能夠爲較慢的設備分配較少的通道。
1. PCI-E插槽及金手指實物圖
PCI-E插槽，從上至下依次爲PCI-E 4X、PCI-E 16X、PCI-E 1X。
PCI-E 1X金手指：
PCI-E 4X金手指：
PCI-E 16X金手指：
2. PCI-E接口定義
說明：
| Ground pin | Zero volt reference | ||
| Power pin | Supplies power to the PCIe card / 爲PCIe卡供電 | ||
| Card-to-host pin | Signal from the card to the motherboard / 從卡到主板的信號 | ||
| Host-to-card pin | Signal from the motherboard to the card / 從主板到卡的信號 | ||
| Open drain | May be pulled low or sensed by multiple cards / 可能拉低或由多張卡感應 | ||
| Sense pin / 感應針 | Tied together on card / 綁在一張卡上 | ||
| Reserved | Not presently used, do not connect | ||
| PCI-Express Connector Pin-Out / PCIE連接器引腳 | ||||
| Pin | Side B Connector / B側 | Side A Connector / A側 | ||
| # | Name | Description | Name | Description |
| 1 | +12v | +12 volt power /主電源引腳 | PRSNT#1 | Hot plug presence detect / 熱插拔存在檢測，必須連接到最遠的PRSNT2 # |
| 2 | +12v | +12 volt power | +12v | +12 volt power |
| 3 | +12v | +12 volt power /有的標爲保留針腳RSVD | +12v | +12 volt power |
| 4 | GND | Ground | GND | Ground |
| 5 | SMCLK | SMBus clock /系統管理總線 | JTAG2 | TCK |
| 6 | SMDAT | SMBus data | JTAG3 | TDI |
| 7 | GND | Ground | JTAG4 | TDO |
| 8 | +3.3v | +3.3 volt power | JTAG5 | TMS |
| 9 | JTAG1 | +TRST# | +3.3v | +3.3 volt power |
| 10 | 3.3Vaux | 3.3v volt power /備用(輔助)電源 | +3.3v | +3.3 volt power |
| 11 | WAKE# | Link Reactivation /鏈接激活信號 | PWRGD | Power Good /電源準備好信號 有歧義，有的當做復位用 |
| Mechanical Key | ||||
| 12 | RSVD | Reserved /有的標爲CLKREQ#，請求運行時鐘 | GND | Ground |
| 13 | GND | Ground | REFCLK+ | Reference Clock |
| 14 | HSOp(0) | Transmitter Lane 0, | REFCLK- | Differential pair |
| 15 | HSOn(0) | Differential pair | GND | Ground |
| 16 | GND | Ground | HSIp(0) | Receiver Lane 0, |
| 17 | PRSNT#2 | Hotplug detect / 熱插拔存在檢測 | HSIn(0) | Differential pair |
| 18 | GND | Ground | GND | Ground |
| End of the 1X connector / PCI Express×1卡在引腳18處結束 | ||||
| 19 | HSOp(1) | Transmitter Lane 1, | RSVD | Reserved |
| 20 | HSOn(1) | Differential pair | GND | Ground |
| 21 | GND | Ground | HSIp(1) | Receiver Lane 1, |
| 22 | GND | Ground | HSIn(1) | Differential pair |
| 23 | HSOp(2) | Transmitter Lane 2, | GND | Ground |
| 24 | HSOn(2) | Differential pair | GND | Ground |
| 25 | GND | Ground | HSIp(2) | Receiver Lane 2, |
| 26 | GND | Ground | HSIn(2) | Differential pair |
| 27 | HSOp(3) | Transmitter Lane 3, | GND | Ground |
| 28 | HSOn(3) | Differential pair | GND | Ground |
| 29 | GND | Ground | HSIp(3) | Receiver Lane 3, |
| 30 | RSVD | Reserved | HSIn(3) | Differential pair |
| 31 | PRSNT#2 | Hot plug detect | GND | Ground |
| 32 | GND | Ground | RSVD | Reserved |
| End of the 4X connector / PCI Express×4帶寬模式在引腳32處結束 | ||||
| 33 | HSOp(4) | Transmitter Lane 4, | RSVD | Reserved |
| 34 | HSOn(4) | Differential pair | GND | Ground |
| 35 | GND | Ground | HSIp(4) | Receiver Lane 4, |
| 36 | GND | Ground | HSIn(4) | Differential pair |
| 37 | HSOp(5) | Transmitter Lane 5, | GND | Ground |
| 38 | HSOn(5) | Differential pair | GND | Ground |
| 39 | GND | Ground | HSIp(5) | Receiver Lane 5, |
| 40 | GND | Ground | HSIn(5) | Differential pair |
| 41 | HSOp(6) | Transmitter Lane 6, | GND | Ground |
| 42 | HSOn(6) | Differential pair | GND | Ground |
| 43 | GND | Ground | HSIp(6) | Receiver Lane 6, |
| 44 | GND | Ground | HSIn(6) | Differential pair |
| 45 | HSOp(7) | Transmitter Lane 7, | GND | Ground |
| 46 | HSOn(7) | Differential pair | GND | Ground |
| 47 | GND | Ground | HSIp(7) | Receiver Lane 7, |
| 48 | PRSNT#2 | Hot plug detect | HSIn(7) | Differential pair |
| 49 | GND | Ground | GND | Ground |
| End of the 8X connector / PCI Express×8卡在引腳49處結束 | ||||
| 50 | HSOp(8) | Transmitter Lane 8, | RSVD | Reserved |
| 51 | HSOn(8) | Differential pair | GND | Ground |
| 52 | GND | Ground | HSIp(8) | Receiver Lane 8, |
| 53 | GND | Ground | HSIn(8) | Differential pair |
| 54 | HSOp(9) | Transmitter Lane 9, | GND | Ground |
| 55 | HSOn(9) | Differential pair | GND | Ground |
| 56 | GND | Ground | HSIp(9) | Receiver Lane 9, |
| 57 | GND | Ground | HSIn(9) | Differential pair |
| 58 | HSOp(10) | Transmitter Lane 10, | GND | Ground |
| 59 | HSOn(10) | Differential pair | GND | Ground |
| 60 | GND | Ground | HSIp(10) | Receiver Lane 10, |
| 61 | GND | Ground | HSIn(10) | Differential pair |
| 62 | HSOp(11) | Transmitter Lane 11, | GND | Ground |
| 63 | HSOn(11) | Differential pair | GND | Ground |
| 64 | GND | Ground | HSIp(11) | Receiver Lane 11, |
| 65 | GND | Ground | HSIn(11) | Differential pair |
| 66 | HSOp(12) | Transmitter Lane 12, | GND | Ground |
| 67 | HSOn(12) | Differential pair | GND | Ground |
| 68 | GND | Ground | HSIp(12) | Receiver Lane 12, |
| 69 | GND | Ground | HSIn(12) | Differential pair |
| 70 | HSOp(13) | Transmitter Lane 13, | GND | Ground |
| 71 | HSOn(13) | Differential pair | GND | Ground |
| 72 | GND | Ground | HSIp(13) | Receiver Lane 13, |
| 73 | GND | Ground | HSIn(13) | Differential pair |
| 74 | HSOp(14) | Transmitter Lane 14, | GND | Ground |
| 75 | HSOn(14) | Differential pair | GND | Ground |
| 76 | GND | Ground | HSIp(14) | Receiver Lane 14, |
| 77 | GND | Ground | HSIn(14) | Differential pair |
| 78 | HSOp(15) | Transmitter Lane 15, | GND | Ground |
| 79 | HSOn(15) | Differential pair | GND | Ground |
| 80 | GND | Ground | HSIp(15) | Receiver Lane 15, |
| 81 | PRSNT#2 | Hot plug present detect | HSIn(15) | Differential pair |
| 82 | RSVD#2 | Hot Plug Detect | GND | Ground |
| End of the 16X connector | ||||
PCIE規格
|
傳輸通道數
|
腳Pin總數
|
主接口區Pin數
|
總 長 度
|
主接口區 長度
|
|
1
|
36
|
14
|
25 mm
|
7.65 mm
|
|
4
|
64
|
42
|
39 mm
|
21.65 mm
|
|
8
|
98
|
76
|
56 mm
|
38.65 mm
|
|
16
|
164
|
142
|
89 mm
|
71.65 mm
|
|
規格
|
總線寬度
|
工作時脈
|
傳輸速率
|
|
PCI-E x1
|
8 位
|
2.5 GHz
|
512 MiB/s
|
|
PCI-E x2
|
8 位
|
2.5 GHz
|
1.0 GiB/s
|
|
PCI-E x4
|
8 位
|
2.5 GHz
|
2.0 GiB/s
|
|
PCI-E x8
|
8 位
|
2.5 GHz
|
4.0 GiB/s
|
|
PCI-E x16
|
8 位
|
2.5 GHz
|
8.0 GiB/s
|
| PCI Express 版本 | 行代碼 | 傳輸速率 | 吞吐量 | |||
| ×1 | ×4 | ×8 | ×16 | |||
| 1.0 | 8b/10b | 2.5GT/s | 250MB/s | 1GB/s | 2GB/s | 4GB/s |
| 2.0 | 8b/10b | 5GT/s | 500MB/s | 2GB/s | 4GB/s | 8GB/s |
| 3.0 | 128b/130b | 8GT/s | 984.6MB/s | 3.938GB/s | 7.877GB/s | 15.754GB/s |
| 4.0 | 128b/130b | 16GT/s | 1.969GB/s | 7.877GB/s | 15.754GB/s | 31.508GB/s |
| 5.0 | 128b/130b | 32 or 25GT/s | 3.9 or 3.08GB/s | 15.8 or 12.3GB/s | 31.5 or 24.6GB/s | 63.0 or 49.2GB/s |
PS：帶寬、傳輸速率與吞吐量區別
舉個例吧
一條路每秒最多能過100輛車（寬帶就相當於100輛/秒）。
而並不是每秒都會有100輛車過，假如第一秒有0輛，第二秒有10輛...，（但是最多不能超過100輛）。
所以有第1秒0輛/秒，第2秒10輛/秒，第3秒30輛/秒，這不能說帶寬多少吧，於是就用吞吐量表示具體時間通過的量有多少（也有可能等於帶寬的量）。
由此可知帶寬是說的是最大值速率，吞吐量說的是某時刻速率。但吞吐量不能超過最大速率。
傳輸速率又稱作帶寬，在數據傳輸的過程中，兩個設備之間數據流動的物理速度稱爲傳輸速率，單位bps。各種傳輸媒介中信號的流動速度是恆定的，即使數據鏈路的傳輸速率不同，也不會出現忽快忽慢的情況。傳輸速率不是指單位數據流動的速度有多快，而是指單位時間內傳輸的數據量有多少。
以我們生活中的道路交通爲例，低速數據鏈路如同車道較少無法讓很多車同時通過的情況，與之相反，高速數據鏈路就相當於有多個車道，一次允許更多車輛行駛的道路。帶寬越大網絡傳輸能力就越強。
主機之間實際的傳輸速率被稱作吞吐量。其單位與帶寬相同，都是bps（Bits per second）。吞吐量不僅衡量帶寬，同時也衡量主機的CPU處理能力、網絡的擁堵程度、報文中數據字段的佔有份額等信息。