SystemVerilog（六）：Testbench（綠皮書）

class transaction;                   // 4屬性2方法的事務
    rand bit[31:0]src,dst,data[8];   // 隨機化數據，dst表目的，src表源
    bit[31:0]crc;                    // 循環冗餘校驗
    
    virtual function void calc_crc;  // 基類虛方法，可以在擴展類中重寫
        crc=src^dst^data.xor;
    endfunction

    virtual function void disoplay(input string prefix="");
        $display("%sTr:src=%h,dst=%h,crc=%h",prefix,src,crc);
    endfunction
enclass

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class Badtr extends transaction;     // 錯誤注入擴展類
    rand bit bad_crc;
    
    virtual function void calc_crc;  // 重寫calc_crc方法
        super.calx_crc();            // 計算正確的crc
        if(bad_crc)crc=~crc;         // 隨機產生錯誤的crc
    endfunction

    virtual function void display(intput string prefix=""); // 重寫display方法
        $write("%sBadtr:bad_crc=%b,",prefix,bad_crc);
        super.display;
    endfunction 
endclass

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class generator;                     //創建事務，隨機化，送給郵箱put
    mailbox gen2drv;
    transaction blueprint;

    function new(mailbox gen2drv);
        this.gen2drv = gen2drv;
        blueprint = new();
    endfunction

    task run();
        transaction tr;
        
        forever begin
            assert(blueprint.randomize)   //這裏的assert？
            tr = blueprint.copy();
            gen2drv.put(tr);
        end
    endtask
endclass 

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class environment;
    mailbox gen2drv;
    generator gen;
    drive drv;

    function build();
        gen2drv = new();
        gen = new(gen2drv);   //注意輸入
        drv = new(gen2drv);
    endfunction

    task run();
        fork                  //注意    
        gen.run();
        drv.run();
        join_none
    endtask

    task wrap_up();
    endtask
endclass

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program automatic test;        //簡單的測試程序，走一遍環境。注意automatic
    environment env;
    initial begin
        env.new();
        env.build();

        begin 
            Badtr bad = new();        //實例錯誤事務
            env.gen.blueprint = bad;  //錯誤對象代替藍圖對象
        end                           //"鉤子"完成事務基類錯誤注入

        env.run();
        env.wrap_up();
    end
endprogram