ARM 指令 CORTEX-M0

http://blog.csdn.net/qq1987924/article/details/35316955

處理器使用的是ARMv6-M Thumb指令集,包括大量的32位的使用Thumb-2技術的指令。表7-22列出了Cortex-M0指令和它們的週期數。週期計數以零等待狀態的系統爲基準。

表7-22 Cortex-M0指令和它們的週期數

MOVE

8-bit immediate

MOVS Rd,#<imm>

1

Lo to Lo

MOVS Rd,Rm

1

Any to Any

MOV Rd,Rm

1

Any to PC

MOV PC,Rm

3

Add

3-bit immediate

ADDS Rd,Rn,#<imm>

1

All registers Lo

ADDS Rd,Rn,Rm

1

續表

Any to Any

ADD Rd,Rd,Rm

1

Any to PC

ADD PC,PC,Rm

3

8-bit immediate

ADDS Rd,Rd,#<imm>

1

With carry

ADCS Rd,Rd,Rm

1

Immediate to SP

ADD SP,SP,#<imm>

1

Form address from SP

ADD Rd,SP ,#<imm>

1

Form address from PC

ADR Rd,<label>

1

Subtract

Lo to Lo

SUBS Rd,Rn,Rm

1

3-bit immediate

SUBS Rd,Rn,#<imm>

1

8-bit immediate

SUBS Rd,Rd,#<imm>

1

With carry

SBCS Rd,Rd,Rm

1

Immediate from SP

SUB SP,SP,#<imm>

1

Negate

RSBS Rd,Rn,#0

1

Multiply

Multiply

MULS Rd,Rm,Rd

132

Compare

Compare

CMP Rn,Rm

1

Negative

CMP Rn,Rm

1

Immediate

CMP Rn,#<imm>

1

Logical

AND

ANDS Rd, Rd, Rm

1

Exclusive OR

EORS Rd, Rd, Rm

1

OR

ORRS Rd, Rd, Rm

1

Bit clear

BICS Rd, Rd, Rm

1

Move NOT

MVNS Rd, Rm

1

AND test

TST Rn, Rm

1

Shift

Logical shift left by immediate

LSLS Rd, Rm, #<shift>

1

Logical shift left by register

LSLS Rd, Rd, Rs

1

Logical shift right by immediate

LSRS Rd, Rm, #<shift>

1

Logical shift right by register

LSRS Rd, Rd, Rs

1

Arithmetic shift right

ASRS Rd, Rm, #<shift>

1

Arithmetic shift right by register

ASRS Rd, Rd, Rs

1

Rotate

Rotate right by register

RORS Rd, Rd, Rs

1

Load

Word, immediate offset

LDR Rd, [Rn, #<imm>]

2

Halfword, immediate offset

LDRH Rd, [Rn, #<imm>]

2

Byte, immediate offset

LDRB Rd, [Rn, #<imm>]

2

Word, register offset

LDR Rd, [Rn, Rm]

2

續表

Halfword, register offset

LDRH Rd, [Rn, Rm]

2

Signed halfword, register offset

LDRSH Rd, [Rn, Rm]

2

Byte, register offset

LDRB Rd, [Rn, Rm]

2

Signed byte, register offset

LDRSB Rd, [Rn, Rm]

2

PC-relative

LDR Rd, <label>

2

SP-relative

LDR Rd, [SP, #<imm>]

2

Multiple, excluding base

LDM Rn!, {<loreglist>}

1+N

Multiple, including base

LDM Rn, {<loreglist>}

1+N

Store

Word, immediate offset

STR Rd, [Rn, #<imm>]

2

Halfword, immediate offset

STRH Rd, [Rn, #<imm>]

2

Byte, immediate offset

STRB Rd, [Rn, #<imm>]

2

Word, register offset

STR Rd, [Rn, Rm]

2

Halfword, register offset

STRH Rd, [Rn, Rm]

2

Byte, register offset

STRB Rd, [Rn, Rm]

2

SP-relative

STR Rd, [SP, #<imm>]

2

Multiple

STM Rn!, {<loreglist>}

1+N

Push

Push

PUSH {<loreglist>}

1+N

Push with link register

PUSH {<loreglist>, LR}

1+N

Pop

Pop

POP {<loreglist>}

1+N

Pop and return

POP {<loreglist>, PC}

4+N

Branch

Conditional

B<cc> <label>

13

Unconditional

B<label>

3

With link

BL<label>

4

With exchange

BX Rm

3

With link and exchange

BLX Rm

3

Extend

Signed halfword to word

SXTH Rd, Rm

1

Signed byte to word

SXTB Rd, Rm

1

Unsigned halfword

UXTH Rd, Rm

1

Unsigned byte

UXTB Rd, Rm

1

Reverse

Bytes in word

REV Rd, Rm

1

Bytes in both halfwords

REV16 Rd, Rm

1

Signed bottom half word

REVSH Rd, Rm

1

State change

Supervisor Call

SVC #<imm>

-

Disable interrupts

CPSID i

1

 

Enable interrupts

CPSIE i

1

Read special register

MRS Rd, <specreg>

4

Write special register

MSR <specreg>, Rn

4

Breakpoint

BKPT #<imm>

Hint

Send event

SEV

1

Wait for event

WFE

2

Wait for interrupt

WFI

2

Yield

YIELD

1

Hint

No operation

NOP

1

Barriers

Instruction synchronization

ISB

4

Data memory

DMB

4

Data synchronization

DSB

4

ISO/IEC的C代碼不能直接地獲取一些Cortex-M0的指令。表7-23列舉了CMSIS的C編譯器中提供的部分內部函數用於產生這些指令。如果一個C編譯器不支持恰當的內部函數,則需要用內嵌彙編來獲取有關指令。

表7-23 CMSIS內部函數

CMSIS內部函數

CMSIS內部函數

CPSIE i

void __enable_irq(void)

REV

uint32_t __REV(uint32_t int value)

CPSID i

void __disable_irq(void)

REV16

uint32_t __REV16(uint32_t int value)

ISB

void __ISB(void)

REVSH

uint32_t __REVSH(uint32_t int value)

DSB

void __DSB(void)

SEV

void __SEV(void)

DMB

void __DMB(void)

WFE

void __WFE(void)

NOP

void __NOP(void)

WFI

void __WFI(void)

CMSIS也提供了幾個函數用於獲取特殊的寄存器,如表7-24所示。

表7-24 CMSIS提供的用於獲取特殊寄存器的函數

特殊寄存器

CMSIS函數

PRIMASK

uint32_t __get_PRIMASK(void)

void __set_PRIMASK(void)

CONTROL

Uint32_t __get_CONTROL(uint32_t value)

Void __set_CONTROL(uint32_t value)

MSP

Uint32_t __get_MSP(void)

Void __set_MSP(uint32_t TopOfMainStack)

PSP

Uint32_t __get_PSP(void)

Void __set_PSP(uint32_t TopOfMainStack)

 

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