學習內容
SDRAM的具體操作詳細介紹
學習所需
IS42S1_datasheet（給出網盤，失效留言）
引腳說明
A0-A11
A0-A11是在活動期間採樣的地址輸入(行地址A0-A11)和讀/寫命令(a0 - a7與A10定義自動充電)。在預充電命令期間採樣A10，以確定是否要對所有BANK進行預充電(A10高)或由BA0、BA1(低)選擇BANK。地址輸入還在加載模式寄存器命令期間提供操作代碼。
總結：
- 地址在ACTIVE/READ/WRITE時有效
- A10可用來表示預充電
- 地址也可作爲模式寄存器的配置值
BA0 and BA1
Bank Select Address (BA0 and BA1) defines which bankthe ACTIVE, READ, WRITE or PRECHARGE commandis being applied.
BANK選擇地址(BA0和BA1)定義了正在應用活動、讀、寫或預充命令的BANK。CAS與RAS和WE一起組成設備命令。
CKE
The CKE input determines whether the CLK input is en-abled. The next rising edge of the CLK signal will be valid when is CKE HIGH and invalid when LOW. When CKE is LOW, the device will be in either power-down mode, CLOCK SUSPEND mode, or SELF-REFRESH mode. CKE is an asynchronous input.
CKE輸入決定了CLK輸入是否被加載。CLK信號的下一個上升沿在CKE高時有效，在低時無效。當CKE值較低時，設備將處於斷電模式、時鐘暫停模式或自刷新模式。CKE是一個異步輸入。
CLK
CLK is the master clock input for this device. Except for CKE, all inputs to this device are acquired in synchroniza-tion with the rising edge of this pin.
CLK是這個設備的主時鐘輸入。除CKE外，該裝置的所有輸入均與該引腳的上升沿同步。
總結：
- CKE輸入決定了CLK輸入是否被加載
- CKE是一個異步輸入
- 所有輸入均與CLK的上升沿同步
CS and DQ0 to DQ15
The CS input determines whether command input is en-abled within the device. Command input is enabled when CS is LOW, and disabled with CS is HIGH. The device remains in the previous state when CS is HIGH. DQ0 to DQ15 are DQ pins. DQ through these pins can be controlled in byte units using the LDQM and UDQM pins.
CS輸入決定命令輸入是否在設備內部被加載。命令輸入在CS低時啓用，在CS高時禁用。當CS較高時，設備保持前一狀態。DQ0到DQ15是DQ引腳。通過這些引腳可以使用LDQM和UDQM引腳以字節單位控制DQ。
LDQM and UDQM
LDQM and UDQM control the lower and upper bytes of the DQ buffers. In read mode, LDQM and UDQM control the output buffer. When LDQM or UDQM is LOW, the corresponding buffer byte is enabled, and when HIGH,disabled. The outputs go to the HIGH Impedance State when LDQM/UDQM is HIGH. This function corresponds to OE in conventional DRAMs. In write mode, LDQM and UDQM control the input buffer. When LDQM or UDQM is LOW, the corresponding buffer byte is enabled, and data can be written to the device. When LDQM or UDQM is HIGH, input data is masked and cannot be written to the device.
LDQM和UDQM控制DQ緩衝區的上下字節。在讀取模式下，LDQM和UDQM控制輸出緩衝區。當LDQM或UDQM低時，相應的緩衝區字節是啓用的，而當高時，則禁用。當LDQM/UDQM高時，輸出進入高阻抗狀態。這個函數相當於傳統dram中的OE。在寫模式下，LDQM和UDQM控制輸入緩衝區。當LDQM或UDQM較低時，將啓用相應的緩衝區字節，可以將數據寫入設備。當LDQM或UDQM很高時，輸入數據被屏蔽，不能寫入設備。
總結：
- 命令輸入在CS低時啓用，在CS高時禁用。當CS較高時，設備保持前一狀態
- LDQM和UDQM控制DQ緩衝區的傳輸字節，在讀取和寫入模式下不相同
RAS, in conjunction with CAS and WE , forms the device command.
RAS與CAS和WE一起組成設備命令。
VDD and GND
V DDq is the output buffer power supply.
V DD is the device internal power supply.
GND q is the output buffer ground.
GND is the device internal ground.
V DDq爲輸出緩衝電源。
vdd是設備內部的電源。
GND q是輸出緩衝地。
GND是設備內部接地。
操作說明
READ
The READ command selects the bank from BA0, BA1 inputs and starts a burst read access to an active row. Inputs A0-A7 provides the starting column location. When A10 is HIGH, this command functions as an AUTO PRECHARGE command. When the auto precharge is selected, the row being accessed will be precharged at the end of the READ burst. The row will remain open for subsequent accesses when AUTO PRECHARGE is not selected. DQ’s read data is subject to the logic level on the DQM inputs two clocks earlier. When a given DQM signal was registered HIGH, the corresponding DQ’s will be High-Z two clocks later. DQ’s will provide valid data when the DQM signal was registered LOW.
READ命令從BA0、BA1輸入中選擇BANK，並啓動對活動行的突發讀訪問。輸入A0-A7提供起始列位置。當A10高時，此命令作爲自動預充命令。當選擇自動預充電時，被訪問的行將在READ burst結束時進行預充電。當沒有選擇自動預充電時，這一行將保持打開狀態，供後續訪問。
DQ的讀數據服從於兩個時鐘之前的DQM輸入的邏輯級別。當一個給定的DQM信號被註冊爲高時，相應的DQ將在 兩個時鐘 之後成爲高z。當DQM信號被註冊爲低信號時，DQ將提供有效的數據。
總結：
- 讀命令時，選擇BANK。
- 開始一個burst的讀
- 地址的低8位爲列地址。
- A10指示在讀完成後是否要自動預充電。
- 同時指明瞭DQM和讀出來的時序關係。
WRITE
A burst write access to an active row is initiated with the WRITE command. BA0, BA1 inputs selects the bank, and the starting column location is provided by inputs A0-A7. Whether or not AUTO-PRECHARGE is used is determined by A10. The row being accessed will be precharged at the end of the WRITE burst, if AUTO PRECHARGE is selected. If AUTO PRECHARGE is not selected, the row will remain open for subsequent accesses. A memory array is written with corresponding input data on DQ’s and DQM input logic level appearing at the same time. Data will be written to memory when DQM signal is LOW. When DQM is HIGH, the corresponding data inputs will be ignored, and a WRITE will not be executed to that byte/column location.
使用寫命令啓動對活動行的突發寫訪問。BA0、BA1輸入選擇BANK，起始列位置由輸入A0-A7提供。是否使用自動預充由A10決定。如果選擇了自動預充電，被訪問的行將在寫突發結束時被預充電。如果沒有選擇自動預充電，這一行將爲後續訪問保持打開狀態。
在DQ和DQM輸入邏輯層上同時寫入相應的輸入數據。當DQM信號較低時，數據將被寫入內存。當DQM較高時，相應的數據輸入將被忽略，並且不會對該字節/列位置執行寫操作。
總結：
- 寫命令時，選擇BANK
- 開始一個burst的寫
- 地址的低8位爲列地址。
- A10指示在寫完成後是否要自動預充電。
- 指明瞭DQ和數據時序關係。同時有效
PRECHARGE
The PRECHARGE command is used to deactivate the open row in a particular bank or the open row in all banks. BA0, BA1 can be used to select which bank is precharged or they are treated as “Don’t Care”. A10 determined whether one or all banks are precharged. After execut-ing this command, the next command for the selected banks(s) is executed after passage of the period t RP , which is the period required for bank precharging. Once a bank has been precharged, it is in the idle state and must be activated prior to any READ or WRITE commands being issued to that bank.
PRECHARGE命令用於停用特定BANK中的開行或所有BANK中的開行。BA0、BA1可以用來選擇哪家BANK是預充電的，或者它們被視爲“不在乎”。A10決定是一個BANK還是所有BANK都要預充電。執行此命令後，所選BANK的下一個命令將在時間t RP(BANK預充所需的時間)之後執行。一旦BANK被預充了電，它就處於空閒狀態，必須在向該BANK發出任何讀或寫命令之前激活它。
總結：
- 可通過A10、BA0和BA1選擇全部BANK或某一個BANK
- 預充電命令後，必須等待TRP時間。
- 預示充電後處於idle狀態。必須active後，才能讀和寫
AUTO PRECHARGE
The AUTO PRECHARGE function ensures that the pre-charge is initiated at the earliest valid stage within a burst.This function allows for individual-bank precharge without requiring an explicit command. A10 to enables the AUTO PRECHARGE function in conjunction with a specific READ or WRITE command. For each individual READ or WRITE command, auto precharge is either enabled or disabled.
AUTO PRECHARGE does not apply except in full-page burst mode. Upon completion of the READ or WRITE burst, a precharge of the bank/row that is addressed is automatically performed.
自動預充電功能確保在最短有效時間內啓動預充電。這個功能允許特定的BANK預充電，而不需要一個明確的命令。A10啓用自動預充功能與特定的讀或寫命令。對於每個單獨的讀或寫命令，自動預充電是啓用或禁用的。
自動預充不適用在全頁突發模式。在完成讀或寫突發事件後，將自動對所尋址的銀行/行進行預充電。
總結：
- A10決定
- 每個讀和寫操作獨立決定
- 全頁模式不支持自動預充電
AUTO REFRESH COMMAND
This command executes the AUTO REFRESH operation. The row address and bank to be refreshed are automaticallygenerated during this operation. The stipulated period (t rc ) is required for a single refresh operation, and no other commands can be executed during this period. This command is executed at least 4096 times every 64ms. During an AUTO REFRESH command, address bits are “Don’t Care”. This command corresponds to CBR Auto-refresh.
此命令執行自動刷新操作。將在此操作期間自動生成要刷新的行地址和BANK。單個刷新操作需要規定的週期(trc)，在此期間不能執行任何其他命令。此命令每64ms至少執行4096次。在自動刷新命令期間，地址位是“不關心”的。此命令對應於CBR自動刷新。
總結：
- 行列地址自動生成
- 需要TRC時間，此時不能有其他命令
- 3.64ms必須至少4096次
SELF REFRESH
During the SELF REFRESH operation, the row address tobe refreshed, the bank, and the refresh interval are generated automatically internally. SELF REFRESH can be used to retain data in the SDRAM without external clocking, even if the rest of the system is powered down. The SELF REFRESH operation is started by dropping the CKE pin from HIGH to LOW. During the SELF REFRESH operation all other inputs to the SDRAM become “Don’t Care”. The device must remain in self refresh mode for a minimum period equal to t ras or may remain in self refresh mode for an indefinite period beyond that. The SELF-REFRESH operation continues as long as the CKE pin remains LOW and there is no need for external control of any other pins.The next command cannot be executed until the device internal recovery period (t rc ) has elapsed. Once CKE goes HIGH, the NOP command must be issued (minimum of two clocks) to provide time for the completion of any internal refresh in progress. After the self-refresh, since it is impossible to determine the address of the last row to be refreshed, an AUTO-REFRESH should immediately be performed for all addresses.
在SELF REFRESH操作期間，將在內部自動生成要刷新的行地址、BANK和刷新間隔。可以使用SELF REFRESH來保留SDRAM中的數據，而不需要外部時鐘，即使系統的其餘部分已經關閉。自我刷新操作是通過將CKE引腳從高到低開始的。在SELF REFRESH操作期間，SDRAM的所有其他輸入都變爲“Don 't Care”。設備必須在至少等於t ras的時間內保持自刷新模式，或者可以在不確定的時間內保持自刷新模式。只要CKE引腳保持低，並且不需要外部控制任何其他引腳，就可以繼續進行自我刷新操作。直到設備內部恢復期(trc)結束後才能執行下一個命令。一旦CKE升高，必須發出NOP命令(至少兩個時鐘)，爲正在進行的任何內部刷新的完成提供時間。自刷新之後，由於不可能確定要刷新的最後一行的地址，因此應該立即對所有地址執行自動刷新。
總結：
- 保留SDRAM中的數據，不需要外部時鐘
BURST TERMINATE（突然終止）
The BURST TERMINATE command forcibly terminates the burst read and write operations by truncating either fixed-length or full-page bursts and the most recently registered READ or WRITE command prior to the BURST TERMINATE.
BURST TERMINATE命令強制終止突發的讀寫操作，方法是在突發終止之前截斷固定長度或整頁突發以及最近註冊的讀或寫命令。
COMMAND INHIBIT（命令禁止）
COMMAND INHIBIT prevents new commands from being executed. Operations in progress are not affected, apart from whether the CLK signal is enabled
命令禁止阻止新命令的執行。除CLK信號是否已啓用外，正在進行的操作不受影響
NO OPERATION（空操作）
When CS is low, the NOP command prevents unwanted commands from being registered during idle or wait states.
LOAD MODE REGISTER（配置模式寄存器 A0-A11有效）
During the LOAD MODE REGISTER command the mode register is loaded from A0-A11. This command can only be issued when all banks are idle.
在加載模式寄存器命令期間，模式寄存器從A0-A11加載。此命令只能在所有銀行空閒時發出。
ACTIVE COMMAND
When the ACTIVE COMMAND is activated, BA0, BA1 inputs selects a bank to be accessed, and the address inputs on A0-A11 selects the row. Until a PRECHARGE command is issued to the bank, the row remains open for accesses.
激活活動命令時，BA0、BA1輸入選擇要訪問的BANK，A0-A11上的地址輸入選擇該行。在向銀行發出PRECHARGE命令之前，該行一直爲訪問打開。
指令
對應狀態的可操作指令
