在調試28335的CAN的發送時出現的問題：
1、接口用錯導致一直失敗；
2、注意28335的CAN總線波特率計算，如下所述：
ECanaShadow.CANBTC.bit.BRPREG = 9;
ECanaShadow.CANBTC.bit.TSEG2REG = 2;
ECanaShadow.CANBTC.bit.TSEG1REG = 10;
以上代碼是配置28335的CAN總線模塊波特率，最後的波特率爲：
按照上面的參數計算最後的波特率爲500k;
同時還需要注意28335的CAN總線中比較特殊的說明,如下所述：
1、是關於波特率配置的描述：
2、關於CAN網絡的說明：
必須保證在網絡中有一個設備和當前節點配置爲同樣的波特率，但是不一定要設置爲接收模式；
附：最後的配置程序：
void InitECana(void) // 初始化CAN總線模塊
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents or return
false data. This is especially true while writing to/reading from a bit
(or group of bits) among bits 16 - 31 */
struct ECAN_REGS ECanaShadow;
EALLOW; // EALLOW enables access to protected bits
/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
ECanaShadow.CANTIOC.bit.TXFUNC = 1;
ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
ECanaShadow.CANRIOC.bit.RXFUNC = 1;
ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
// HECC mode also enables time-stamping feature
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.SCB = 1;
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
/* Initialize all bits of 'Master Control Field' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero
ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;
// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
// as a matter of precaution.
ECanaRegs.CANTA.all = 0xFFFFFFFF; /* Clear all TAn bits */
ECanaRegs.CANRMP.all = 0xFFFFFFFF; /* Clear all RMPn bits */
ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
ECanaRegs.CANGIF1.all = 0xFFFFFFFF;
/* Configure bit timing parameters for eCANA*/
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..
ECanaShadow.CANBTC.all = 0;
#if (CPU_FRQ_150MHZ)
//初始化通信波特率
/*
具體的波特率計算：
波特率=系統時鐘/(2*(BRPREG+TSEG2REG+TSEG1REG+3)),同時需要確保TSEG1REG > TSEG2REG
*/
ECanaShadow.CANBTC.bit.BRPREG = 9;
ECanaShadow.CANBTC.bit.TSEG2REG = 2;
ECanaShadow.CANBTC.bit.TSEG1REG = 10;
#endif
ECanaShadow.CANBTC.bit.SAM = 1;
ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..
/* Disable all Mailboxes */
ECanaRegs.CANME.all = 0; // Required before writing the MSGIDs
EDIS;
}
void InitECanGpio(void)
{
InitECanaGpio();
#if (DSP28_ECANB)
InitECanbGpio();
#endif // if DSP28_ECANB
}
void InitECanaGpio(void)
{
EALLOW;
/* Enable internal pull-up for the selected CAN pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0; // Enable pull-up for GPIO18 (CANRXA)
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0; // Enable pull-up for GPIO19 (CANTXA)
/* Set qualification for selected CAN pins to asynch only */
// Inputs are synchronized to SYSCLKOUT by default.
// This will select asynch (no qualification) for the selected pins.
GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch qual for GPIO18 (CANRXA)
/* Configure eCAN-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be eCAN functional pins.
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3; // Configure GPIO18 for CANRXA operation
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 3; // Configure GPIO19 for CANTXA operation
EDIS;
}
#if (DSP28_ECANB)
void InitECanbGpio(void)
{
EALLOW;
/* Enable internal pull-up for the selected CAN pins */
// Pull-ups can be enabled or disabled by the user.
// This will enable the pullups for the specified pins.
// Comment out other unwanted lines.
GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pull-up for GPIO12 (CANTXB)
GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; // Enable pull-up for GPIO13 (CANRXB)
/* Set qualification for selected CAN pins to asynch only */
// Inputs are synchronized to SYSCLKOUT by default.
// This will select asynch (no qualification) for the selected pins.
// Comment out other unwanted lines.
GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch qual for GPIO13 (CANRXB)
/* Configure eCAN-B pins using GPIO regs*/
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 2; // Configure GPIO12 for CANTXB operation
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 2; // Configure GPIO13 for CANRXB operation
EDIS;
}
#endif // if DSP28_ECANB
具體關於CAN總線中的收發問題：
1、發送
.具體描述參見上圖，配置程序如下所示：
//發送一幀數據
/*
CAN總線發送數據結構體
typedef struct
{
unsigned short int StdId; //標準幀ID,值爲0x000到0x7FFF;
unsigned long int ExtId; //擴展幀ID,值爲0到0x1FFFFFFF
unsigned char SAE_J1939_Flag;//表示是否使用SAE J1939協議
SAE_ID SAE_J1939_ID;
unsigned char IDE; //幀類型,可爲：CAN_ID_STD(標準幀),CAN_ID_EXT(擴展幀)
unsigned char DLC; //數據長度，可爲0到8;
unsigned char MBox_num;//郵箱編號,可爲0到31;
unsigned short int Tx_timeout_cnt;
CAN_MSG_DATA CAN_Tx_msg_data; /*!< 幀消息內容,共8字節 */
} CanTxMsg;
*/
void CAN_Send_Msg(CanTxMsg *can_tx_msg)//發送一幀數據
{
Uint16 time_cnt;
Uint32 mbox_enable_temp = 0x0000;
Uint32 mbox_disable_temp = 0x0000;
Uint32 mbox_dir_temp = 0x0000;
mbox_enable_temp = 1<<(can_tx_msg->MBox_num);
mbox_disable_temp = ~(1<<(can_tx_msg->MBox_num));
mbox_dir_temp = ~(1<<(can_tx_msg->MBox_num));
struct ECAN_REGS ECanaShadow;
volatile struct MBOX *Mailbox;
Mailbox = &ECanaMboxes.MBOX0+can_tx_msg->MBox_num;
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.all &= mbox_disable_temp;
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
if(can_tx_msg->IDE == CAN_ID_STD)
{
Mailbox->MSGID.all = can_tx_msg->StdId; //standard identifier
Mailbox->MSGID.bit.IDE = can_tx_msg->IDE;
}
else if(can_tx_msg->IDE == CAN_ID_EXT)
{
if(can_tx_msg->SAE_J1939_Flag == 0)
{
Mailbox->MSGID.all = can_tx_msg->ExtId; //extended identifier.
Mailbox->MSGID.bit.IDE = can_tx_msg->IDE;
}
else
{
Mailbox->MSGID.all = can_tx_msg->SAE_J1939_ID.id; //extended identifier.
Mailbox->MSGID.bit.IDE = can_tx_msg->IDE;
}
}
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
ECanaShadow.CANMD.all &=mbox_dir_temp;//設置郵箱工作方向,0表示郵箱工作於發送,1表示工作於接收
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.all |= mbox_enable_temp;//使能郵箱
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
Mailbox->MSGCTRL.bit.DLC = can_tx_msg->DLC;//數據長度
Mailbox->MDL.byte.BYTE0 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte0;
Mailbox->MDL.byte.BYTE1 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte1;
Mailbox->MDL.byte.BYTE2 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte2;
Mailbox->MDL.byte.BYTE3 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte3;
Mailbox->MDH.byte.BYTE4 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte4;
Mailbox->MDH.byte.BYTE5 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte5;
Mailbox->MDH.byte.BYTE6 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte6;
Mailbox->MDH.byte.BYTE7 = can_tx_msg->CAN_Tx_msg_data.msg_Byte.byte7;
ECanaShadow.CANTRS.all = 0;
ECanaShadow.CANTRS.all |= mbox_enable_temp; // Set TRS for mailbox under test
ECanaRegs.CANTRS.all = ECanaShadow.CANTRS.all;
do
{
ECanaShadow.CANTA.all = ECanaRegs.CANTA.all;
time_cnt++;
} while(((ECanaShadow.CANTA.all&mbox_enable_temp) == 0 )&&(time_cnt<100)); // Wait for TA5 bit to be set..
ECanaShadow.CANTA.all = 0;
ECanaShadow.CANTA.all = mbox_enable_temp; // Clear TA5
ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;
}
接收相關配置：（數據接受通常會採用中斷來接收數據),具體配置程序如下，包括中斷的相關配置；
void CAN_Rx_Config(void)//接收配置函數，程序中相關備註
{
struct ECAN_REGS ECanaShadow;
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.bit.ME1 = 0;//不使能郵箱1
ECanaShadow.CANME.bit.ME31 = 0;//不使能郵箱31
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
/*----------以下代碼是配置接受郵箱的相關代碼------------*/
//郵箱1相關配置
ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;//配置數據長度，應該是沒意義的;
ECanaMboxes.MBOX1.MSGID.all = 0x07909ADC;//設置接收消息的有效ID
ECanaMboxes.MBOX1.MSGID.bit.AME =1;//屏蔽使能位,如果需要使用屏蔽,必須將該位置1
ECanaMboxes.MBOX1.MSGID.bit.IDE = CAN_ID_EXT;
/*
LAMn[28:0]
這些位啓用一個進入消息的任意標識符位的屏蔽。
1 針對接受到的標識符的相應位， 接受一個 0 或 1（ 無關） 。
0 接收到的標識符位值必須與 MSGID 寄存器的相應標識符位相匹配。
*/
ECanaLAMRegs.LAM1.all = 0x000000F;//
/*
LAMI 本地接受屏蔽標識符擴展位
1 可以接收標準和擴展幀。 在擴展幀的情況下， 標識符的所有 29 位被存儲在郵箱中， 本地接受屏 蔽寄存器的所有 29 位被過濾器使用。 在一個標準幀的情況下， 只有標識符的頭 11 個位（ 28 至 18 位）
和本地接受屏蔽被使用。
0 存儲在郵箱中的標識符擴展位決定了哪些消息應該被接收到
*/
ECanaLAMRegs.LAM1.bit.LAMI = 1;
//郵箱31相關配置
ECanaMboxes.MBOX31.MSGCTRL.bit.DLC = 8;//配置數據長度，應該是沒意義的;
ECanaMboxes.MBOX31.MSGID.all = 0x07909ABC;//設置接收消息的有效ID
ECanaMboxes.MBOX31.MSGID.bit.AME =1;//屏蔽使能位,
ECanaMboxes.MBOX31.MSGID.bit.IDE = CAN_ID_EXT;
/*
LAM[28:0]
這些位啓用一個進入消息的任意標識符位的屏蔽。
1 針對接受到的標識符的相應位， 接受一個 0 或 1（ 無關） 。
0 接收到的標識符位值必須與 MSGID 寄存器的相應標識符位相匹配。
*/
ECanaLAMRegs.LAM31.all = 0x000000F;//
/*
LAMI 本地接受屏蔽標識符擴展位
1 可以接收標準和擴展幀。 在擴展幀的情況下， 標識符的所有 29 位被存儲在郵箱中,本地接受屏蔽寄
存器的所有 29 位被過濾器使用。 在一個標準幀的情況下， 只有標識符的頭 11 個位（ 28 至 18 位）
和本地接受屏蔽被使用。
0 存儲在郵箱中的標識符擴展位決定了哪些消息應該被接收到
*/
ECanaLAMRegs.LAM31.bit.LAMI = 1;
ECanaRegs.CANRMP.all = 0xFFFFFFFF;
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
ECanaShadow.CANMD.bit.MD1 = 1;
ECanaShadow.CANMD.bit.MD31 = 1;
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.bit.ME1 = 1;//使能郵箱1
ECanaShadow.CANME.bit.ME31 = 1;//使能郵箱1
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
}
void CAN_Rx_IT_Concig(void)//郵箱中斷相關配置
{
EALLOW;
ECanaRegs.CANMIM.bit.MIM1 = 1;//使能中斷郵箱1的中斷;
ECanaRegs.CANMIL.bit.MIL1 = 1;//將中斷1連接至中斷1;
ECanaRegs.CANMIM.bit.MIM31 = 1;//使能中斷郵箱31的中斷;
ECanaRegs.CANMIL.bit.MIL31 = 1;//將中斷1連接至中斷1;
ECanaRegs.CANGIM.bit.I1EN = 1;//使能中斷1;
EDIS;
}
//具體的中斷函數,在清除GMIF1標誌位時,不能通過向GMIF1寫1來清除,只能通過向RMPn來清除該標誌位
/*
CAN總線接收數據的結構體
typedef struct
{
unsigned short int StdId; //標準幀ID,值爲0x000到0x7FFF;
unsigned long int ExtId; //擴展幀ID,值爲0到0x1FFFFFFF
unsigned char SAE_J1939_Flag;//表示是否使用SAE J1939協議
SAE_ID SAE_J1939_ID;
unsigned char IDE; //幀類型,可爲：CAN_ID_STD(標準幀),CAN_ID_EXT(擴展幀)
unsigned char DLC; //數據長度，可爲0到8
unsigned char MBox_num;//發送所用郵箱編號
unsigned short int Rx_timeout_cnt;
CAN_MSG_DATA CAN_Rx_msg_data; /*!< 幀消息內容,共8字節 */
} CanRxMsg;
*/
__interrupt void Ecana_isr1(void)
{
if(ECanaRegs.CANGIF1.bit.GMIF1 == 1)
{
if(ECanaRegs.CANRMP.bit.RMP1 == 1)
{
//讀取該位是知道當前哪一個郵箱收到數據,
can_rx_msg.MBox_num = ECanaRegs.CANGIF1.bit.MIV1;
can_rx_msg.DLC = ECanaMboxes.MBOX1.MSGCTRL.bit.DLC;
can_rx_msg.IDE = ECanaMboxes.MBOX1.MSGID.bit.IDE;
if(can_rx_msg.IDE == CAN_ID_EXT)
{
can_rx_msg.ExtId = ECanaMboxes.MBOX1.MSGID.all&0x1FFFFFFF;
can_rx_msg.SAE_J1939_ID.id = can_rx_msg.ExtId;
}
else if(can_rx_msg.IDE == CAN_ID_STD)
{
can_rx_msg.StdId = ECanaMboxes.MBOX1.MSGID.bit.STDMSGID;
}
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte0 = ECanaMboxes.MBOX1.MDL.byte.BYTE0;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte1 = ECanaMboxes.MBOX1.MDL.byte.BYTE1;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte2 = ECanaMboxes.MBOX1.MDL.byte.BYTE2;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte3 = ECanaMboxes.MBOX1.MDL.byte.BYTE3;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte4 = ECanaMboxes.MBOX1.MDH.byte.BYTE4;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte5 = ECanaMboxes.MBOX1.MDH.byte.BYTE5;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte6 = ECanaMboxes.MBOX1.MDH.byte.BYTE6;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte7 = ECanaMboxes.MBOX1.MDH.byte.BYTE7;
ECanaRegs.CANRMP.bit.RMP1 = 1;
}
else if(ECanaRegs.CANRMP.bit.RMP31 == 1)
{
can_rx_msg.MBox_num = ECanaRegs.CANGIF1.bit.MIV1;
can_rx_msg.DLC = ECanaMboxes.MBOX31.MSGCTRL.bit.DLC;
can_rx_msg.IDE = ECanaMboxes.MBOX31.MSGID.bit.IDE;
if(can_rx_msg.IDE == CAN_ID_EXT)
{
can_rx_msg.ExtId = ECanaMboxes.MBOX31.MSGID.all&0x1FFFFFFF;
can_rx_msg.SAE_J1939_ID.id = can_rx_msg.ExtId;
}
else if(can_rx_msg.IDE == CAN_ID_STD)
{
can_rx_msg.StdId = ECanaMboxes.MBOX31.MSGID.bit.STDMSGID;
}
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte0 = ECanaMboxes.MBOX31.MDL.byte.BYTE0;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte1 = ECanaMboxes.MBOX31.MDL.byte.BYTE1;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte2 = ECanaMboxes.MBOX31.MDL.byte.BYTE2;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte3 = ECanaMboxes.MBOX31.MDL.byte.BYTE3;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte4 = ECanaMboxes.MBOX31.MDH.byte.BYTE4;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte5 = ECanaMboxes.MBOX31.MDH.byte.BYTE5;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte6 = ECanaMboxes.MBOX31.MDH.byte.BYTE6;
can_rx_msg.CAN_Rx_msg_data.msg_Byte.byte7 = ECanaMboxes.MBOX31.MDH.byte.BYTE7;
ECanaRegs.CANRMP.bit.RMP31 = 1;
}
}
PieCtrlRegs.PIEACK.bit.ACK9 = 1;
}